The source code for the driver is included with the Vitis Unified Software Platform installation and being available in the Xilinx Github repository. Please refer to Chapter 72: USB2.0 Controller in Versal TRM which includes links to the official documentation and resource utilization. ![]() Please refer to Chapter 31: USB3.0 Controller in ZynqMp TRM which includes links to the official documentation and resource utilization. This document explains USB 2.0 & 3.0 peripheral mode standalone configurations for MASS STORAGE and DFU gadgets This page gives an overview of the Zynq Ultrascale+ MPSoC usbpsu driver which is available as part of the Xilinx Vivado and SDK distribution. 5.1.1 Mass-Storage: USB Polled/Interrupt mode example.
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